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MNEMOSENE
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Publications

  1. M. Le Gallo, A. Sebastian, G. Cherubini, H. Giefers and E. Eleftheriou, "Compressed Sensing With Approximate Message Passing Using In-Memory Computing", in IEEE Transactions on Electron Devices 65 (10), 4304 (2018). DOI: 10.1109/TED.2018.2865352. Repository: Link
  2. A. Burrello, K. Schindler, L. Benini, A. Rahimi, "One-shot Learning for iEEG Seizure Detection Using End-to-end Binary Operations: Local Binary Patterns with Hyperdimensional Computing", in proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference (BioCAS), Cleveland, OH, October 17-19, 2018. DOI: 10.1109/BIOCAS.2018.8584751. Repository: Link
  3. J. Yu, H. A. Du Nguyen, L. Xie, M. Taouil, S. Hamdioui, "Memristive devices for computation-in-memory" in proceedings of the 2018 ACM/IEEE Design, Automation, and Test in Europe Conference (DATE), Dresden, Germany, March 19-23, 2018. DOI: 10.23919/date.2018.8342278​. Repository: Link
  4. S. R. Nandakumar, M. Le Gallo, I. Boybat, B. Rajendran, A. Sebastian, and E. Eleftheriou, "A phase-change memory model for neuromorphic computing", in Journal of Applied Physics 124, 152135 (2018). DOI: 10.1063/1.5042408. Repository: Link
  5. A. Burrello, L. Cavigelli, K. Schindler, L. Benini, A. Rahimi, ‘‘Laelaps: An Energy-Efficient Seizure Detection Algorithm from Long-term Human iEEG Recordings without False Alarms’’ in proceedings of the 2019 ACM/IEEE Design, Automation, and Test in Europe Conference (DATE), Florence, Italy, March 25-29, 2019. DOI: 10.23919/DATE.2019.8715186. Repository: Link ​
  6. J. Yu, H. A. Du Nguyen, M. A. Lebdeh, M. Taouil, S. Hamdioui, "Time-division Multiplexing Automata Processor" in proceedings of the 2019 ACM/IEEE Design, Automation, and Test in Europe Conference (DATE), Florence, Italy, March 25-29, 2019. DOI: 10.23919/DATE.2019.8715140. Repository: Link
  7. S. Hamdioui, H. A. Du Nguyen, M. Taouil, A. Sebastian, M. Le Gallo, S. Pande, S. Schaafsma, F. Catthoor, S. Das, F. Garcia Redondo, G. Karunaratne, A. Rahimi, L. Benini. "Applications of Computation-In-Memory Architectures based on Memristive Devices" in proceedings of the 2019 ACM/IEEE Design, Automation, and Test in Europe Conference (DATE), Florence, Italy, March 25-29, 2019. DOI: 10.23919/DATE.2019.8715020. Repository: Link​
  8. M. Schmuck, L. Benini, A. Rahimi, "Hardware Optimizations of Dense Binary Hyperdimensional Computing: Rematerialization of Hypervectors, Binarized Bundling, and Combinational Associative Memory", in ACM Journal on Emerging Technologies in Computing,  accepted for publication. DOI: 10.3929/ethz-b-000338354. Repository: Link
  9. S. Benatti, F. Montagna, V. Kartsch, A. Rahimi, D. Rossi, L. Benini​, "Online Learning and Classification of EMG-Based Gestures on a Parallel Ultra-Low Power Platform using Hyperdimensional Computing​", in IEEE Transactions on Biomedical Circuits and Systems (TBioCAS), accepted for publication (2019). DOI:  10.1109/TBCAS.2019.2914476. Repository: Link 
  10. K. Vadivel, P. Jääskeläinen, R. Jordans, H. Kultala, S. Stuijk, H. Corporaal, "Towards Efficient Code Generation for Coarse-Grained Architectures", in proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, Sankt Goar (DE), May 27-28, 2019. DOI: 10.1145/3323439.3323990. Repository: Link
  11. A. BanaGozar, S. Wong, M.A. Lebdeh, K. Vadivel, J. Yu, S. Hamdioui, S. Stuijk, H. Corporaal, "CIM-SIM: Computation In Memory SIMulator", in proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, Sankt Goar (DE), May 27-28, 2019. DOI: 10.1145/3323439.3323989. Repository: Link​
  12. M.A. Lebdeh, U. Reinsalu, H.A. Du Nguyen, S. Wong, S. Hamdioui, "Memristive Device Based Circuits for Computation-in-Memory Architectures", in proceedings of the 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo (JP), May 26-29, 2019. DOI: 10.1109/ISCAS.2019.8702542. Repository: Link
  13. A. Siemon, D. Wouters, S. Hamdioui, S. Menzel, "Memristive Device Modeling and Circuit Design Exploration for Computation-in-Memory", in proceedings of the 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo (JP), May 26-29, 2019. DOI: 10.1109/ISCAS.2019.8702600. Repository: Link
  14. A. Siemon, S. Ferch, A. Heittmann, R. Waser, D. J. Wouters, S. Menzel, "Analyses of Neuromorphic Networks using Memristive Devices with Non-continuous Resistance Levels", in APL Materials, DOI: 10.1063/1.5108658. Link
  15. F. Cüppers, S. Menzel, C. Bengel, A. Hardtdegen, M. von Witzleben, U. Böttger, R. Waser, S. Hoffmann-Eifert, "Exploiting the switching dynamics of HfO2/TiOx-based ReRAM devices for reliable analogue memristive behaviour", in APL Materials, DOI: 10.1063/1.5108654. Link
  16. A. Burrello, K. A. Schindler, L. Benini, A. Rahimi, "Hyperdimensional Computing with Local Binary Patterns: One-shot Learning for Seizure Onset Detection and Identification of Ictogenic Brain Regions from Short-time iEEG Recordings", in IEEE Transactions on Biomedical Engineering. DOI:  10.1109/TBME.2019.2919137. Repository: Link
  17. 17. N. Vasilache, O. Zinenko, T. Theodoridis, P. Goyal, Z. Devito, W. S. Moses, S. Verdoolaege, A. Adams, A. Cohen, “The Next 700 Accelerated Layers: From Mathematical Expressions of Network Computation Graphs to Accelerated GPU Kernels, Automatically”, in ACM Transactions on Architecture and Code Optimization, DOI: 10.1145/3355606. Repository: Link
  18.  J. Zhao, A. Cohen, “Flextended Tiles: a Flexible Extension of Overlapped Tiles for Polyhedral Compilation”, in ACM Transactions on Architecture and Code Optimization, DOI: 10.1145/3369382. Link
  19. H. A. D. Nguyen, J. Yu, M. A. Lebdeh, M. Taouil, S. Hamdioui, “A computation-in-memory accelerator based on resistive devices”, in Proceedings of the International Symposium on Memory Systems - MEMSYS '19, DOI: 10.1145/3357526.3357554. Link
  20. M. Douthwaite, F. Garcıa-Redondo, P. Georgiou and S. Das, “A Time-Domain Current-Mode MAC Engine for Analogue Neural Networks in Flexible Electronics”, in Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference (BioCAS), DOI: 10.1109/BIOCAS.2019.8919190. Link
  21. M. Hersche, S. Sangalli, L. Benini, A. Rahimi, “Evolvable Hyperdimensional Computing: Unsupervised Regeneration of Associative Memory to Recover Faulty Components”, in Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2020), Genoa, Italy. DOI: 10.3929/ethz-b-000387115. Link
  22. M. Hersche, L. Benini, A. Rahimi, “Binary Models for Motor-Imagery Brain–Computer Interfaces: Sparse Random Projection and Binarized SVM”, in Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2020), Genoa, Italy. DOI: 10.3929/ethz-b-000387116. Link
  23. ​M. Hersche, P. Rupp, L. Benini, A. Rahimi, “Compressing Subject-specific Brain–Computer Interface Models into One Model by Superposition in Hyperdimensional Space”, in Proceedings of the 2020 ACM/IEEE Design, Automation and Test in Europe (DATE 2020), Grenoble, France. DOI: 10.3929/ethz-b-000387115. Link
  24. B. Hoffer, V. Rana, S. Menzel, R. Waser, S. Kvatinsky, “Experimental Demonstration of Memristor-Aided Logic (MAGIC) Using Valence Change Memory (VCM)”, in IEEE Transactions on Electron Devices, DOI: 10.1109/TED.2020.3001247. Link
  25. S. Wiefels, C. Bengal, N. Kopperberg, K. Zhang, R. Waser, S. Menzel, “HRS Instability in Oxide-Based Bipolar Resistive Switching Cells”, in IEEE Transactions on Electron Devices, DOI: 10.1109/TED.2020.3018096. Link
  26. M. Zahedi, M. Mayahinia, M. Abu. Lebdeh, S. Wong, S. Hamdioui, "Efficient Organization of Digital Periphery to Support Integer Datatype for Memristor-Based CIM", in 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), DOI: 10.1109/ISVLSI49217.2020.00047. Link
  27. G. Karunaratne, M. Le Gallo, G. Cherubini, L. Benini, A. Rahimi, A. Sebastian, "In-memory hyperdimensional computing", in Nature Electronics, DOI: 10.1038/s41928-020-0410-3. Link
  28. I. Giannopoulos, A. Singh, M. Le Gallo, V.P. Jonnalagadda, S. Hamdioui, and A. Sebastian, "In-memory database query", in Advanced Intelligent Systems, DOI: 10.1002/aisy.202000141. Link
  29. C. Bengel, A. Siemon, F. Cüppers, S. Hoffmann-Eifert, A. Hardtdegen, M. von Witzleben, L. Hellmich, R. Waser, S. Menzel, "Variability-Aware Modeling of Filamentary Oxide-Based Bipolar Resistive Switching Cells Using SPICE Level Compact Models", in IEEE Transactions on Circuits and Systems I: Regular Papers, DOI: 10.1109/TCSI.2020.3018502. Link
  30. A. BanaGozar, K. Vadivel, J. Multanen, P. Jääskeläinen, S. Stuijk, H. Corporaal, "System Simulation of Memristor Based Computation In Memory Platforms", in Proceedings of nternational Conference on Embedded Computer Systems: Architectures, Modeling and Simulation. Link
  31. A. Drebes, L. Chelini, O. Zinenko, A. Cohen, H. Corporaal, T. Grosser, K. Vadivel, N. Vasilache, "TC-CIM: Empowering Tensor Comprehensions for Computing-In-Memory", in Proceedings of 10th International Workshop on Polyhedral Compilation Techniques. Link
  32. K. Vadivel, L. Chelini, A. BanaGozar, G. Singh, S. Corda, R. Jordans, H. Corporaal, "TDO-CIM: transparent detection and offloading for computation in-memory", in Proceedings of DATE 2020, DOI: 10.23919/DATE48585.2020.9116464. Link
  33. K. Komisarczyk, L. Chelini, K. Vadivel, R. Jordans, H. Corporaal, "PET-to-MLIR: A polyhedral front-end for MLIR", in Proceedings of 23rd Euromicro Conference on Digital System Design, DOI: 10.1109/DSD51259.2020.00091. Link
  34. F. García-Redondo, S. Das, G. Rosendale, "Training DNN IoT Applications for Deployment On Analog NVM Crossbars", in Proceedings of 2020 International Joint Conference on Neural Networks (IJCNN), DOI: 10.1109/IJCNN48605.2020.9206822. Link
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The MNEMOSENE project has received funding from the European Union’s Horizon 2020
Research and Innovation Programme under grant agreement No 780215.
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