[25.01.2018] Official launch of the MNEMOSENE project
Mass production and commercialization of technologies based on integrated circuits, such as computers and mobile phones, have completely revolutionized our society, ultimately resulting in the Digital Revolution and leading humanity into what is now referred to as the Information Age.
Emerging electronic applications, such as Internet-of-Things and Big Data analytics, are expected to impact our lives even further, but they require increasing computing power with severe constraints on size, energy consumption and reliability. Current manufacturing technologies, electronic devices and computer architectures are unable to deliver the functionalities and features needed by these applications. In order to meet these challenging requirements and prepare the European electronics industry for the next generation of computing technologies, novel approaches have to be devised and implemented.
In this context, the “MNEMOSENE” project held its kick-off meeting in Manchester (UK) on Jan 25th, 2018. Coordinated by Delft Technical University (NL), the project consortium includes eight other partners from six different countries: Eindhoven University of Technology and IMEC (NL), ETH Zurich and IBM Research – Zurich (CH), Arm (UK), RWTH Aachen University (DE), INRIA (FR) and Intelligentsia Consultants (LU).
This ambitious research and innovation action addresses the theme "Development of new approaches to scale functional performance of information processing and storage substantially beyond the state-of-the-art technologies with a focus on ultra-low power and high performance" of the European Union’s Horizon 2020 ICT research and innovation programme, which funded the 3-year project with a total of 4M €.
In order to meet the requirements of future electronic applications, MNEMOSENE will focus on the development, design and demonstration of a Computation-In-Memory (CIM) architecture based on extending arrays of non-volatile resistive switching devices (memristors) with logic functionality inside or around the cell array. CIM architectures allow integration of information processing and storage at the same physical location, having the potential to (a) eliminate the communication and memory bottleneck, (b) support massive parallelism to increase the overall performance, (c) drastically enhance energy efficiency, and (d) be cheaper to manufacture.
Development of such a radically innovative computing architecture will be a real breakthrough, enabling the solution of many computational problems in minutes rather than days at affordable energy and cost, resulting in orders of magnitude increase in performance. To achieve this result, research efforts in MNEMOSENE will be concentrated on (a) identifying potential applications (e.g. genomics, data reconstruction for medical imaging, radio interferometry, etc.) and developing new appropriate algorithmic solutions for the CIM architecture, (b) developing and designing new mapping methods integrated in a framework for efficient compilation of the new algorithms into CIM macro-level operations, (c) developing a macro-architecture based on the integration of groups of CIM tiles, (d) developing and demonstrating the micro-architecture level of CIM tiles and their models and (e) designing a simulator and FPGA emulator for the new architecture in order to demonstrate its superiority.
Finally, to ensure impacts beyond the project timeframe, the MNEMOSENE partners have foreseen a 9-12 year technology development roadmap that, starting from the integration of a CIM die with a conventional CPU on a single chip, will ultimately lead to a CIM-based computer.
This project has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement No 780215