• Home
  • Objectives
  • In Brief
  • Consortium
  • News
  • Publications
  • Downloads
  • Contact
MNEMOSENE
  • Home
  • Objectives
  • In Brief
  • Consortium
  • News
  • Publications
  • Downloads
  • Contact

[30.08.2020] Report published on the final compilation infrastructure 
MNEMOSENE has recently published a report describing the final version of the parallelizing compiler for the Computation-in-Memory (CIM) architecture developed in the project. Created by MNEMOSENE consortium partner INRIA, the compiler allows for the compilation of high-level representations of critical operations of target applications for the CIM architecture with a simplified and extensible compilation flow.
 
The end-to-end compilation flow and orchestration of accelerated functions with host-code and the CIM run-time were verified with multiple implementations of a HAR application executed on the project’s simulator.
 
The use of multi-level intermediate representation (MLIR) allows for a more robust identification of performance-critical operations for offloading, simplified transformations and a simplified code generation scheme based on common MLIR and Low Level Virtual Machine (LLVM) infrastructure.
 
To read the full report, please click on the following link.
Picture
The MNEMOSENE project has received funding from the European Union’s Horizon 2020
Research and Innovation Programme under grant agreement No 780215.
  • Home
  • Objectives
  • In Brief
  • Consortium
  • News
  • Publications
  • Downloads
  • Contact